Whenever I use the 555 timer, it seems that the output polarity is
invariably incorrect, and the way the 555 functions, it normally cannot
generate a duty cycle of less than 50% — 90% yes, 10% NO! This inverted
555 circuit generates duty cycles of less than 50%. Everything works
the same except for the polarity. Why not simply invert the output with
a transistor? Will not that do the same? Legitimate question…
Actually NO, because a transistor that inverts the output cannot provide
the desirable totem pole source/sink output function of pin 3. And
there is another reason that we will get in the future—this is a 555VCO
circuit that requires the inverted timer.
The schematic shows (3) circuits, because one circuit does not work well over the entire Vcc range.
The first simply uses a “normal” 2N3904 garden variety transistor, and this works well when Vcc < 9V. When Vcc > 9V, the base to emitter junction starts to zener and disrupts operation. Transistor base to emitter junction zeners a little above -6V.
The second circuit adds D1 to the emitter of Q1 in order to increase VEBO. With this mod, Vcc may be increased to the 18V limit. However, D1 may be eliminated if we use the special 2SC2878 switching transistor that has a VBEO rating of -25V. These devices are no longer in production, but are available on eBay—every serious experimenter should have a few in his component collection. The types now in production use the tiny SO-23 SMD package.
The third circuit uses a J112 N-Channel JFET for Q1. The JFET is a curious device that works well for the application provided we allow for the VGS(OFF) parameter. VGS must be less than Vcc /3. (e.g. if Vcc = 9V, VGS(OFF) must be less than 9V /3 or 3V for proper operation). Since the VGS(OFF) parameter is sloppy (-1 to -5V), the device must be selected—to the left is a simple test circuit—actually, most devices will work OK. The J112 should also be in every serious experimenter’s component collection.
Inverted 555 Oscillograph
How it works
You will note that C1 is tied to Vcc rather than common and that R1 & R2 charge it in the negative direction. By connecting C1 to Vcc, the relatively high discharge current does not run through the power source. The reset transistor (Q1) discharges the capacitor in the positive direction. R1 & R2 are determined in the same fashion as the normal 555 timer. R3 is a pull-up resistor for the open collector output (pin 7) so it can drive the emitter follower (or source follower) reset transistor.
R1 scales the output frequency—here it is about 1.25kHZ and it can be rescaled to whatever you need.
R2 controls the reset pulse width for low duty cycle (short output pulse) output—the larger it gets, the more it affects output frequency.
Pin 5 does not need a bypass capacitor unless you desire high stability—generally I omit this capacitor.
Protoboard setup
For the future
555 VCO circuit
Preferred components for the serious experimenter
2SC2878 – datasheet
J112 N-Channel JFET transistor – datasheet
NE555 timer IC – datasheet
2N4148 signal diode, 100V, 150mA (garden variety diode) (same as 1N916) (1N914 is rated at 75V)
Glossary of undocumented words and idioms (for our ESL friends)
garden variety –idiom—literally something that grows in your garden—commonly available component
Inverted 555 Timer Schematic
The schematic shows (3) circuits, because one circuit does not work well over the entire Vcc range.
The first simply uses a “normal” 2N3904 garden variety transistor, and this works well when Vcc < 9V. When Vcc > 9V, the base to emitter junction starts to zener and disrupts operation. Transistor base to emitter junction zeners a little above -6V.
The second circuit adds D1 to the emitter of Q1 in order to increase VEBO. With this mod, Vcc may be increased to the 18V limit. However, D1 may be eliminated if we use the special 2SC2878 switching transistor that has a VBEO rating of -25V. These devices are no longer in production, but are available on eBay—every serious experimenter should have a few in his component collection. The types now in production use the tiny SO-23 SMD package.
The third circuit uses a J112 N-Channel JFET for Q1. The JFET is a curious device that works well for the application provided we allow for the VGS(OFF) parameter. VGS must be less than Vcc /3. (e.g. if Vcc = 9V, VGS(OFF) must be less than 9V /3 or 3V for proper operation). Since the VGS(OFF) parameter is sloppy (-1 to -5V), the device must be selected—to the left is a simple test circuit—actually, most devices will work OK. The J112 should also be in every serious experimenter’s component collection.
Inverted 555 Oscillograph
How it works
You will note that C1 is tied to Vcc rather than common and that R1 & R2 charge it in the negative direction. By connecting C1 to Vcc, the relatively high discharge current does not run through the power source. The reset transistor (Q1) discharges the capacitor in the positive direction. R1 & R2 are determined in the same fashion as the normal 555 timer. R3 is a pull-up resistor for the open collector output (pin 7) so it can drive the emitter follower (or source follower) reset transistor.
R1 scales the output frequency—here it is about 1.25kHZ and it can be rescaled to whatever you need.
R2 controls the reset pulse width for low duty cycle (short output pulse) output—the larger it gets, the more it affects output frequency.
Pin 5 does not need a bypass capacitor unless you desire high stability—generally I omit this capacitor.
Protoboard setup
For the future
555 VCO circuit
Preferred components for the serious experimenter
2SC2878 – datasheet
J112 N-Channel JFET transistor – datasheet
NE555 timer IC – datasheet
2N4148 signal diode, 100V, 150mA (garden variety diode) (same as 1N916) (1N914 is rated at 75V)
Glossary of undocumented words and idioms (for our ESL friends)
garden variety –idiom—literally something that grows in your garden—commonly available component