How many have had legitimate problems with the 555 timer? Let me guess…it involved the reset line, did it not? We all know that pin 4 must be set high before oscillation begins, but what is its threshold? input current? and what happens when it is operated slightly out of spec? This may be the very first attempt in documentation of this obscure phenomenon.


555 pin 4 reset behavior schematic
555 pin 4 reset behavior Test Circuit 1
Method
To determine reset threshold, a transistor integrator generates a low impedance, negative-going ramp voltage signal that integrates from +5V to –0.65V. To obtain the negative voltage, the power supply is split to provide –0.7V. While it is slowly changing at the rate of -1V /S (trace 1), pins 2 & 6 are monitored for oscillation (trace 2). A 3rd trace monitors the output (pin 3). All data is logged on the spreadsheet.
A total of (8) devices were tested, including (2) CMOS TLC555N devices.
When running, the 555 oscillates at approx. 100hZ. Vcc = 5V.
Data

Oscillograph

Observations
The threshold voltage is exceptionally low—lower than any true logic device. Specifications indicate a threshold range of 0.4 to 1.0V in bipolar devices, and 0.4 to 1.5V in CMOS device. Actual measurements indicate a range of 0.65 to 0.75V (bipolar) and 1.1V (CMOS).
What is most interesting is what happens when the voltage drops a little below –0.12V. At this voltage, pin 7 turns off and the voltage at pins 2 & 6 floats high while pin 3 demonstrates an abnormally high saturation voltage (0.8V)—normal is 0.1V. While this is an out-of-spec condition, it remains important information to know because it occurs very close to zero volts and may be subject to noise.
In some cases, this anomaly can actually occur above 0V. I recall from years ago some 555’s that exhibited this behavior at approx +20mV. The solution at the time was the addition of a series resistor in the reset line. Of course these devices were out of spec and therefore defective according to published specifications. Since then, I think manufacturers have been testing for this specific condition. I challenge readers to locate some of these strange 555’s and make comment—very simple to test for this condition by simply shorting pin 4 to common and see if pin 7 allows capacitor voltage to float up.
One of the CMOS devices actually started to oscillate again at -0.65V. I have had issues with this chip before, so I think that I can write it off as defective—may have taken a static discharge…
Not recommended as a voltage threshold function input
Due to the extremely low and variable threshold, the reset line must not be used as an input level threshold. I know it is used this way in numerous electroschematics.com circuits, but I cannot recommend it—this may be an explanation why some circuits fail to operate.
Looks good on paper, but this is an out of spec condition

This is a typical interface to avoid—looks clean and simple and works with most logic interfaces, but does not work with the 555. What a simulator would show? A simulator cannot handle out of spec conditions.
Another way to preset /reset the 555

Open collector comparators etc. work well as an interface to the 555.
Input current
Reset current maxed out at 0V. Actual range was -13 to -33uA. The minus sign indicates that current comes out of pin 4 (sourced) as opposed to going into the pin (sinked). CMOS input current was understandably immeasurable. Actual specification for the bipolar version is 400uA typical. From this data you can determine what you need to drive it below the reset threshold voltage—Max series resistor value must not generally exceed 470Ω or so.
Photos

For the future
Quirky LM358 /LM324 /LM293 /LM339 common mode input range issues
Glossary of undocumented words and idioms (for our ESL friends)
write it off –idiom—consider defective—forget it—give up on that idea…
Recommended devices for the serious experimenter

LM555CN
DIP-8 Package
DigiKey LM555CNFS-ND, $0.43 each

TLC555CP
DIP-8 Package, CMOS
DigiKey 296-1857-5-ND, $0.74 each
 
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